1. Field of the Invention
The present invention relates to a resolution-enhancing CMOS all-digital pulse-mixing method and device thereof suitable for a low-level semiconductor manufacturing process. Particularly, the present invention relates to the double-stage or multi-stage resolution-enhancing CMOS all-digital pulse-mixing method and device thereof.
2. Description of the Related Art
By way of example, U.S. Pat. No. 6,288,587, entitled “CMOS Pulse Shrinking Delay Element with Deep Subnanosecond Resolution,” discloses a CMOS pulse shrinking delay element with deep subnanosecond resolution applicable to a Time-to-Digital Converter (TDC). The CMOS pulse shrinking delay element includes at least three internal adjacent elements and can control its pulse shrinking or expanding capability by adjusting the size ratio or driving capabilities between two of the internal adjacent elements.
Accordingly, the above CMOS pulse shrinking delay element can avoid adjusting an external bias voltage or continuously calibrate the conventional CMOS pulse shrinking delay element in order to control pulse shrinking or expanding capabilities, to facilitate simplification of circuits using the delay element, to permit more precise design and control of the pulse shrinking or expanding capabilities of every element in a TDC circuit, and in practice to reduce single shot errors in a cyclic TDC utilizing the pulse shrinking delay element to on the order of ten picoseconds, resulting in a TDC having extremely fine resolution, excellent accuracy, low power consumption, and low sensitivity to supply voltage and ambient temperature variations.
Moreover, the above CMOS pulse shrinking delay element is designed to form a full-customized pulse-shrinking device which is not a CMOS multi-stage pulse-shrinking or pulse-stretching device but an ordinary CMOS single-stage full-customized pulse-shrinking device.
However, there is a need of improving the conventional CMOS pulse-shrinking, pulse-stretching or shrink-and-stretch mixing method and device thereof for modifying the circuit structure and enhancing the functions (e.g. resolution problem). The above-mentioned patent is incorporated herein by reference for purposes including, but not limited to, indicating the background of the present invention and illustrating the situation of the art.
As is described in greater detail below, the present invention provides a CMOS all-digital pulse-mixing method and device thereof for enhancing resolution with simplifying a semiconductor-designing process and reducing a semiconductor-designing time. A plurality of homogeneous logic elements, a first element parallel connection set and a second element parallel connection set are combined to form a CMOS all-digital pulse-mixing device. The first element parallel connection set and the second element parallel connection set are an odd-positioned element parallel connection set and an even-positioned element parallel connection set. The first element parallel connection set and the second element parallel connection set are applied to stretch (or shrink) pulse signals for enhancing resolution of the device in such a way as to mitigate and overcome the above problem.